Dr. Rodney S. Ridley
- The Allan P. Kirby Center, 1st floor
- (570) 408-4592
Dr. Rodney S. Ridley, Sr. is currently the Director/Chair of the Division of Engineering and Physics at Wilkes University, where he oversees the faculty and staff in Applied & Engineering Sciences, Mechanical Engineering, Electrical Engineering, Engineering Management and Physics. The division is ABET accredited and grants both BS and MS degrees. He is also an Associate Professor of Engineering with research interest in wide-band gap semiconductors and other novel electronic materials processing and devices. He also has interests in Nanotechnology education and processing techniques as well as Intellectual property management. He is active in consulting and is currently working with GE Global Research Center on Advanced Power Semiconductor Device development and manufacturing using III-V and other materials. Prior to joining Wilkes University he held the position of Director of Device and Process Development for Velox Semiconductor in Somerset NJ, Vice-President of Technology for Data Friendly Inc. in Philadelphia PA, Principal Engineer for Advanced Process Development at Fairchild Semiconductor in South Portland ME & Mountaintop PA. While at Fairchild in Mountaintop, Dr. Ridley was named a Fairchild Key Technologist.
Dr. Ridley holds 18 issued US Patents; he has authored and/or co-authored 10 articles in refereed journals and over 25 conference articles. In addition he has been the key note speaker at leading industry events and conferences. He is a member of several university and industrial advisory boards, engineering societies and conference committees.
Dr. Ridley holds a PhD in Engineering Science & Mechanics and an M.S. degree in Electrical Engineering, both of which were granted by the Pennsylvania State University. He also received a B.S. degree in Physics from Lincoln University (PA).
Degrees with fields, institution, and date
PhD Engineering Science & Mechanics Penn State University 1996
M.S. Electrical Engineering Penn State University 1992
B.S. Physics Lincoln University 1987
Years in academia, date of original appointment, and date(s) of promotion
· 1 yr.
· Appointed May , 2009
2007 Director of Device and Process Development, Velox Semiconductor Inc
2006 Vice-President of Technology, Data Friendly Inc
2001 Principle Process, Device Engineer & Project Manager, Fairchild Semiconductor
1999 Staff Process Development Engineer & Project Manager, Intersil Corp
1998 Adjunct Professor, Division of Engineering and Physics, Wilkes University
1996 Staff Process Development Engineer & Project Manager, Harris Semiconductor
Scientific and professional societies
- Member of Electrochemical Society Inc.
- Electronics Division Executive Committee, 2001 to date
- Treasurer, term 2005-2007
- Conference Session Chair, 8th and 9th Intern. Symp. on Cleaning Tech. in Semiconductor Device Manufacturing, 2003 & 2005
· Technical Committee & Session Chair, IEEE/SEMI Adv. Semiconductor Manufacturing Conference and Workshop, 1999 to date
· Program Committee & Session Chair, The American Ceramic Society, Symp. on Finishing of Adv. Ceramics and Glasses, 1999
Professional development activities: Conferences and Seminars
Institutional and professional service
- Various Departmental and University wide committees
· Pennsylvania Nanofabrication Manufacturing Technology Partnership, 2005 to date
· Pennsylvania Dept. of Community & Economic Development, Business Involvement Committee, 2004 to 2006
o Chairman of Advisory Committee for the NE PA Regional Imitative, 2005 to 2006
- Penn State University (Wilkes-Barre and Hazleton Campuses) College of Eng., Electrical Eng. Technology, 2000 to 2006
- Lock Haven University, College of Eng, Electrical En Technology/Nanofabrication Manufacturing Technology Program, 2002
Percentage of time available for research or scholarly activitiesas needed
Percentage of time committed to the program:
50% Mechanical Engineering
50% Electrical Engineering
· L. J. Passmore, K. Sarpatwari, S. A. Suliman, O.O. Awadelkarim, R. S. Ridley, G. Dolny, J. Michalowicz, and C.T. Wu, “Modified Three Terminal Charge Pumping Technique Applied to Vertical Transistor Structures”, J. Vac. Sci. Technol. B, Vol. 23, No. 5, Sep/Oct 2005, pp. 2189-2193.
- J. Ruzyllo, K. Chang, D.O. Lee, P. Roman, K. Shanmugasundaram, J. Wang, P. Mumbauer, R. Grant, C-T. Wu, P. Roman, R. Ridley, and G. Dolny, “Silicon Surface Treatments in Advanced MOS Gate Processing”, Journal of Microelectronic Engineering, Volume 72, Issues 1-4, April 2004, pp. 130-135.
· S. A. Suliman, O. O. Awadelkarim, R. S. Ridley, and G. M. Dolny, “Gate-Oxide Grown on the Sidewalls and Base of a U-Shaped Si Trench: Effects of the Oxide and Oxide/Si Interface Condition on the Properties of Vertical MOS Devices “, Journal of Microelectronic Engineering, Vol. 72, Issues 1-4, April 2004, pp. 247-254.
· O.O. Awadelkarim, S. A. Suliman, K. Sarpatwari, L. J Passmore, R. S. Ridley, and G. Dolny, “On the Reliability of U-Shaped Trench-Gated Metal-Oxide Semiconductor Field Effect Transistors”, Proc. of 13th Int. Workshop in the Physics of Semiconductor Devices (IWPSD), New Delhi, India, December 13-17, 2005.
· K. Chang, A. Witt, A. Hoff, R. Woodson, R. S. Ridley, G. Dolny, B. Thurmond, and J. Ruzyllo, “Studies of Roughness of Silicon Carbide Surfaces”, Proc. of the 9th Int. Symp. on Wafer Cleaning Techn. in Semiconductor Device Manufacturing, J. Ruzyllo, et al., Editors, ECS Transactions Vol. 1 No. 3, 2005, pp. 228-233.
· K. Sarpatwari, L. J. Passmore, S. A. Suliman, O.O. Awadelkarim, G. Dolny, R. S. Ridley, R. Woodin, A. Witt, J Shovlin, “Current-Voltage Characteristics and Charge-Carrier Traps in N-Type 4H-SiC Schottky Structures”, Proc. of the Intern. Conference for Materials for Adv. Technologies (ICMAT 2005) & IUMRS-Intern. Conference on Adv. Materials (ICAM 2005), Singapore, July 3-8, 2005.
· R. Dwyer, R. S. Ridley, Sr., P. Bath, T. Grebs, and J. Cumbo, “Overcoming the Challenges in Thin Wafer (< 8mil) Manufacturing”, Proc of the 2004 IEEE/SEMI Adv. Semiconductor Manufacturing Conference and Workshop, Boston, MA, May 4-6, 2004, pp 5-9.
- 2002- 2004 Fairchild Semiconductor Key Technologist
- U.S. Patent # 7,504,303: March 17, 2009, U.S. Patent # 7,476,589: January 13, 2009
- U.S. Patent # 7,449,354: November 11, 2008, U.S. Patent # 7,436,021: October 14, 2008.
- U.S. Patent # 7,416,948: August 26, 2008, U.S. Patent # 6,818,947: November 16, 2004.
- U.S. Patent # 6,673,681: January 06, 2004, U.S. Patent # 6,635,535: October 21, 2003.
- U.S. Patent # 6,602,768: August 5, 2003, U.S. Patent # 6,573,569: June 03, 2003.
- U.S. Patent # 6,465,325: October 15, 2002, U.S. Patent # 6,433,385: August 13, 2002.
- U.S. Patent # 6,399,022: June 4, 2002, U.S. Patent # 6,367,493: April 9, 2002.
- U.S. Patent # 6,365,942: April 2, 2002, U.S. Patent # 6,314,974: November 13, 2001.
- U.S. Patent # 6,309,952: October 30, 2001, U.S. Patent # 6,211,550, April 3, 2001.